Summary — What This Chapter Covers
- Von Neumann architecture: one memory holds both data and instructions (the stored program concept), and instructions are fetched and executed one at a time.
- Special purpose registers: PC, MAR, MDR, ACC, IX, CIR and the Status Register.
- ALU, CU, system clock and IAS; the address, data and control buses.
- Performance depends on processor type and cores, bus width, clock speed and cache.
- USB, HDMI and VGA ports connect peripherals.
- The fetch–execute cycle in register transfer notation, and how interrupts are detected and handled.
- Assembly language and machine code; the two-pass assembler; instruction groups; immediate, direct, indirect, indexed and relative addressing.
- Logical, arithmetic and cyclic shifts; testing and setting bits with masks to monitor and control devices.
1. Von Neumann Model and Registers
Central Processing Unit (CPU) architecture
The stored program concept
In the Von Neumann model there is a single processor and a single memory that holds both program instructions and data; instructions are fetched from memory and executed one after another. This is the stored program concept: a program must be loaded into main memory to be run, and changing the program only means loading different instructions.
A register is a very fast storage location inside the processor. General purpose registers hold any data being processed; special purpose registers each have one job.
| Register | Purpose |
|---|
| Program Counter (PC) | Holds the address of the next instruction to be fetched |
| Memory Address Register (MAR) | Holds the address of the memory location about to be read from or written to |
| Memory Data Register (MDR) | Holds the data or instruction just read from memory, or about to be written to memory |
| Accumulator (ACC) | General purpose register that holds the value currently being processed and the results of ALU operations |
| Index Register (IX) | Holds a value added to an address to give the address actually used (indexed addressing) |
| Current Instruction Register (CIR) | Holds the instruction currently being decoded and executed |
| Status Register | Individual bits (flags) show conditions such as carry, overflow, negative, zero, and whether an interrupt has occurred |
2. ALU, CU, Clock, IAS and Buses
Central Processing Unit (CPU) architecture
Who does what, and how data moves
The Arithmetic and Logic Unit (ALU) carries out calculations and logical operations (AND, OR, shifts, comparisons). The Control Unit (CU) fetches and decodes instructions and sends control signals to coordinate every other part of the computer. The system clock produces timing signals that synchronise all components. The Immediate Access Store (IAS) is the main memory (RAM) that the processor can access directly; it holds the programs and data currently in use.
| Bus | Direction | Carries |
|---|
| Address bus | One-way: processor → memory/devices | The address of the location to read or write (from the MAR) |
| Data bus |
Two-way |
| Control bus |
Two-way |
Performance
processor type and number of cores