Hardware and Virtual Machines

• RISC: few, simple, fixed-length instructions, mostly one clock cycle each, many registers, pipelining. CISC: many complex, variable-length instructions, multi-cycle, more work done in hardware.
• Pipelining overlaps the fetch, decode, execute stages of successive instructions. Interrupts and branches complicate it.
• Flynn's four architectures: SISD, SIMD, MISD, MIMD. Massively parallel computers link very many processors to work on one problem.
• A virtual machine is software that emulates a computer; it lets one machine run several operating systems in isolation.
• Half adder: S = A XOR B, C = A AND B. A full adder adds a carry in as well.
• Flip-flops (SR, JK) store one bit and are the building blocks of registers and memory.
• De Morgan's laws and Boolean algebra simplify expressions; Karnaugh maps simplify them visually by grouping 1s.

RISC, CISC, pipelining, Flynn, VMs

A CISC (Complex Instruction Set Computer) processor has a large set of instructions, some of which do several low-level operations at once (for example load from memory, add and store in one instruction). A RISC (Reduced Instruction Set Computer) processor has a small set of simple instructions that each do one thing, and builds complex operations from several of them.

Pipelining splits instruction execution into stages and works on a different instruction in each stage at the same time, like a production line. A five-stage pipeline uses instruction fetch (IF), instruction decode (ID), operand fetch (OF), instruction execute (IE) and write back (WB). Registers matter because each stage must hold its intermediate results, and RISC's many registers let operands stay in the processor rather than in slower memory.

Interrupts.

Flynn's four architectures

massively parallel computer

Virtual machines

virtual machine (VM)